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DLVSDigital Logic Visualizing System

Logic Lab

Universal Gates

Build every other gate from only NAND gates or only NOR gates, and check each build against the real gate.

Build gates from NAND only

Make a
A B Output 0
0A0BY=0

Where one signal enters both pins of a gate, the inputs are tied together and the gate acts as a NOT.

Netlist: 2 NAND gates

1
n1
NAND(A, B)
0
Y
NAND(n1)inputs tied: acts as NOT
ABANDNAND buildmatch
0000✓
0100✓
1000✓
1111✓

NAND and NOR are universal: either one alone can build every other gate. Tying both inputs of a NAND gate together makes a NOT. AND is a NAND followed by that NOT; OR is NAND of the two inverted inputs (De Morgan). Every row of the build matches the real gate.