Logic Lab
Design Procedure
Design a combinational circuit from a truth table: simplify each output, draw the gates in AND-OR, NAND or NOR form and test it.
1Specification
Add three bits (two operands and a carry-in). Two outputs: the sum bit and the carry-out.
2Truth table
| A | B | Cin | Sum | Cout |
|---|---|---|---|---|
| 0 | 0 | 0 | ||
| 0 | 0 | 1 | ||
| 0 | 1 | 0 | ||
| 0 | 1 | 1 | ||
| 1 | 0 | 0 | ||
| 1 | 0 | 1 | ||
| 1 | 1 | 0 | ||
| 1 | 1 | 1 |
Click an output to cycle 0 → 1 → X. You can change a preset too and the rest of the page follows.
3Simplify each output
Sum = A′·B′·Cin + A′·B·Cin′ + A·B′·Cin′ + A·B·Cin
4 terms, 12 literalsCout = B·Cin + A·Cin + A·B
3 terms, 6 literals4Draw and verify the logic diagram
Sum
AND gates feed one OR gate. A circle on a gate input is an inverter, so there is one gate per term plus the final gate. Flip the inputs to check the answer.
Cout
AND gates feed one OR gate. A circle on a gate input is an inverter, so there is one gate per term plus the final gate. Flip the inputs to check the answer.
The design procedure: state the problem, name the inputs and outputs, write the truth table, simplify every output with a K-map (here the same engine as the Logic Solver), then draw the gates. The switches on each diagram are step 5: check that every input row gives the output you wrote in the table. Try the NAND-only and NOR-only buttons to see the same design in universal gates.